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 IRF150
Data Sheet March 1999 File Number
1824.3
40A, 100V, 0.055 Ohm, N-Channel Power MOSFET
This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly Developmental Type TA17421.
Features
* 40A, 100V * rDS(ON) = 0.055 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER IRF150 PACKAGE TO-204AE BRAND IRF150
Symbol
D
NOTE: When ordering, include the entire part number.
G
S
Packaging
JEDEC TO-204AE
DRAIN (FLANGE)
SOURCE (PIN 2) GATE (PIN 1)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRF150
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRF150 100 100 40 25 160 20 150 1.2 150 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC. TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured between the Contact Screw on the Flange that is Closer to Source and Gate Pins and the Center of Die Measured from the Source Lead, 6mm (0.25in) from the Flange and the Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances
D LD G LS S
Electrical Specifications
PARAMETER
TEST CONDITIONS VGS = 0V, ID = 250A (Figure 10) VGS = VDS , ID = 250A VDS = Rated BVDSS , VGS = 0V VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC VDS > ID(ON) x rDS(ON)MAX , VGS = 10V VGS = 20V VGS = 10V, ID = 20A (Figures 8, 9) VDS > ID(ON) x rDS(ON)MAX , ID = 20A (Figure 12) VDD = 24V, ID 20A, RG = 4.7, RL = 1.2 (Figures 17, 18) MOSFET Switching Times are Essentially Independent of Operating Temperature
MIN 100 2.0 40 9.0 -
TYP 0.045 11 63 27 36 2000 1000 350 5.0
MAX 4.0 25 250 100 0.055 35 100 125 100 120 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
VGS = 10V, ID = 50A, VDS = 0.8 x Rated BVDSS , Ig(REF) = -1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11)
-
Internal Source Inductance
LS
-
12.5
-
nH
Thermal Impedance Junction to Case Thermal Impedance Junction to Ambient
RJC RJA Free Air Operation
-
-
0.8 30
oC/W oC/W
2
IRF150
Source to Drain Diode Specifications
PARAMETER Continuous Source to DrainCurrent Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D
MIN -
TYP -
MAX 40 160
UNITS A A
S
Diode Source to Drain Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = 40A, VGS = 0V (Figure 13) TJ = 150oC, ISD = 40A, dISD/dt = 100A/s TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/s
-
600 3.3
2.5 -
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 10V, starting TJ = 25oC, L = 170H, RG = 50, Peak IAS = 40A. See Figures 15, 16.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0
Unless Otherwise Specified
40
0.8 0.6 0.4 0.2 0
ID, DRAIN CURRENT (A)
32
24
16
8
0 0 50 100 150 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
ZJC , TRANSIENT THERMAL
1.0 IMPEDANCE (oC/W) 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 0.1 PDM t1 t2 t2 NOTES: DUTY FACTOR: D = t1/t2 TJ = PDM x ZJC + TC 1 10
t1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
3
IRF150 Typical Performance Curves
103 OPERATION IN THIS REGION IS LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 102 ID, DRAIN CURRENT (A)
Unless Otherwise Specified (Continued)
50 10V 40
9V VGS = 8V
80s PULSE TEST
10s 100s 1ms
30
7V
20
10 TJ = MAX RATED TC = 25oC SINGLE PULSE 1 1
10ms 100ms DC 102 103
6V
10
5V 4V
0 0 10 20 30 40 VDS , DRAIN TO SOURCE VOLTAGE (V) 50
10 VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
30 VGS = 10V 9V 8V 7V 12 6V 8 5V 4 4V 0 0 0.4 0.8 1.2 1.6 VDS , DRAIN TO SOURCE VOLTAGE (V) 2.0 0 0 80s PULSE TEST 25 ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 16 20 15 10 5
FIGURE 5. OUTPUT CHARACTERISTICS
20
VDS > ID(ON) x rDS(ON)MAX 80s PULSE TEST
TJ = 125oC TJ = 25oC TJ = -55oC
1
2
3
4
5
6
7
8
VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
0.20 NORMALIZED DRAIN TO SOURCE ON RESISTANCE
2.2
ID = 14A VGS = 10V
rDS(ON) , DRAIN TO SOURCE ON RESISTANCE ()
1.8
0.14 VGS = 10V 0.10
1.4
1.0
0.06
VGS = 20V
0.6
0.02
0
40
80 120 ID , DRAIN CURRENT (A)
160
0.2 -60
-40
-20
0
20
40
60
80
100
120
140
TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2s is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4
IRF150 Typical Performance Curves
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A
Unless Otherwise Specified (Continued)
4000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1.15 C, CAPACITANCE (pF)
3200
1.05
2400 CISS 1600 COSS 800 CRSS
0.95
0.85
0.75 -40
-20
0
20
40
60
80
100
120
140
160
0
0
10
20
30
40
50
TJ , JUNCTION TEMPERATURE (oC)
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
20 ISD, SOURCE TO DRAIN CURRENT (A) 80s PULSE TEST gfs, TRANSCONDUCTANCE (S) 16 TJ = -55oC TJ = 25oC 12 TJ = 125oC
2 102
TJ = 150oC 10 TJ = 25oC
8
4
0
1.0 0 1 2 3 VSD , SOURCE TO DRAIN VOLTAGE (V) 4
0
10
20 30 ID , DRAIN CURRENT (A)
40
50
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20 VGS , GATE TO SOURCE VOLTAGE (V) ID = 40A FOR TEST CIRCUIT, SEE FIGURE 19 15 VDS = 20V VDS = 50V 10 VDS = 80V
5
0 0 28 56 84 112 140 Qg(TOT) , TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
IRF150 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
-
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS
+
tOFF td(OFF) tf 90%
90%
RG DUT
-
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
Ig(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
6
IRF150
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
7


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